[PATCH 2/3] [POWERPC] Xilinx: of_serial support for Xilinx uart 16550.

[Sergei Shtylyov]

Grant Likely wrote:

>> > Personally, I'm not fond of this approach.  There is already some
>> > traction to using the reg-shift property to specify spacing, and I
>> > think it would be appropriate to also define a reg-offset property to
>> > handle the +3 offset and then let the xilinx 16550 nodes use those.

>> Why do we need a reg-offset property when we can just add the offset
>> to the appropriate word(s) in the reg property?

> Primarily because the device creates 32 byte registers starting at 0;
> but they are also big-endian byte accessible so a byte read at offset
> 8 also works.  reg-offset seems to be a better description of the
> hardware to me.

    Ugh... I was just going is it possible to access the chip registers as 
32-bit entities, and employ UPIO_MEM32 mode of 8250.c -- just to avoid that 
reg-offset wart. Now you're telling everybody that it's completely 
superfluous... :-)

> Cheers,
> g.

WBR, Sergei