Bamboo PCI interrupt issues

David Gibson dwg at au1.ibm.com
Tue Mar 4 11:59:22 EST 2008


On Mon, Mar 03, 2008 at 06:02:33PM -0600, Hollis Blanchard wrote:
> I'm having two problems with PCI interrupts as described in bamboo.dts.
> Here is are the properties in question:
> 
> 	/* Bamboo has all 4 IRQ pins tied together per slot */
> 	interrupt-map-mask = <f800 0 0 0>;
> 	interrupt-map = <
> 		/* IDSEL 1 */
> 		0800 0 0 0 &UIC0 1c 8
> 
> 		/* IDSEL 2 */
> 		1000 0 0 0 &UIC0 1b 8
> 
> 		/* IDSEL 3 */
> 		1800 0 0 0 &UIC0 1a 8
> 
> 		/* IDSEL 4 */
> 		2000 0 0 0 &UIC0 19 8
> 	>;
> 
> 
> First, the 440EP[1] and Bamboo[2] user manuals indicate that PCI IRQ 0-3
> -> board IRQ 2-5 -> UIC IRQ 25-28. However, the device tree has that
> reversed, so PCI IRQ 0 appears as UIC IRQ 28 (0x1c).
> 
> Second, the sensitivity seems to be wrong. All these interrupts have the
> sensitivity encoded as 8, which means "high to low edge" in the OpenPIC
> binding. Now, 440EP has a UIC, rather than an OpenPIC, but there is no
> UIC binding AFAICS.

Uh.. there's no binding written down, it's just encoded into uic.c.
But UIC doesn't use OpenPIC sensitivity encoding.  Like FSL's IPIC, it
uses Linux IRQ_TYPE values from include/linux/irq.h which makes 8
"level sensitive, active-low".

> When I change the 8 to a 4 ("active high level"), I see the proper
> values in the UIC polarity register, and PCI interrupts start working in
> KVM.
> 
> Is anybody using Bamboo PCI support right now? Does it actually work?
> 
> [1]
> https://www.amcc.com/MyAMCC/retrieveDocument/PowerPC/440EP/PPC440EP_UM2000.pdf
> [2] Seems to have been deleted from the web. Thanks, AMCC.
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson



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