Level IRQ handling on Xilinx INTC with ARCH=powerpc

Benjamin Herrenschmidt benh at kernel.crashing.org
Wed Jul 30 07:35:23 EST 2008


On Tue, 2008-07-29 at 15:14 +0100, David Howells wrote:
> Sergey Temerkhanov <temerkhanov at yandex.ru> wrote:
> 
> > And handle_level_irq() which is currently used as high-level IRQ handler for
> > Xilinx INTC only tries to acknowledge IRQ before ISR call. So that the IRQ
> > remains asserted in INTC and after the call to desc->chip->unmask() causes
> > spurious attempt to process the same IRQ again. However, call to
> > desc->chip->ack() this time finishes the required procedure of IRQ
> > acknowledge.
> 
> I think I'm seeing the same on the MN10300 arch with its builtin PIC.  My
> soultion was to make unmask() also clear the IRQ latch in the PIC for that
> channel.  We perhaps want an unmask_ack() op.

I've heard about similar issues on other setups... I dislike having a
separate op though, not sure what's the best approach. Another one is to
write a different level handler for such PICs, though that somewhat
sucks too. CC'ing Ingo and Thomas who may have a better idea.

Ben.





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