[PATCH] powerpc: i2c-mpc: make speed registers configurable via FDT

[Jon Smirl]

On 7/25/08, Timur Tabi <timur at freescale.com> wrote:
> On Fri, Jul 25, 2008 at 8:12 AM, Grant Likely <grant.likely at secretlab.ca> wrote:
>
>  > Yes, please use something like clock-frequency or current-speed and do
>  > the calculation.
>
> Ditto.  I already wrote the code that does that for U-Boot, so all you
>  need to do is port it.

I calculate the register values in the i2s driver. There is the issue
of requesting a frequency the hardware can't make exactly (Freescale -
more FractionalN dividers please!).

	if (dir == SND_SOC_CLOCK_OUT) {
		psc_i2s->sysclk = freq;
		if (clk_id == MPC52xx_CLK_CELLSLAVE) {
			psc_i2s->sicr |= MPC52xx_PSC_SICR_CELLSLAVE | MPC52xx_PSC_SICR_GENCLK;
		} else { /* MPC52xx_CLK_INTERNAL */
			psc_i2s->sicr &= ~MPC52xx_PSC_SICR_CELLSLAVE;
			psc_i2s->sicr |= MPC52xx_PSC_SICR_GENCLK;

			clkdiv = ppc_proc_freq / freq;
			err = ppc_proc_freq % freq;
			if (err > freq / 2)
				clkdiv++;

			dev_dbg(psc_i2s->dev, "psc_i2s_set_sysclk(clkdiv %d freq error=%ldHz)\n",
					clkdiv, (ppc_proc_freq / clkdiv - freq));
				
			return mpc52xx_set_psc_clkdiv(psc_i2s->dai.id + 1, clkdiv);
		}
	}

	if (psc_i2s->sysclk) {
		framesync = bits * 2;
		bitclk = (psc_i2s->sysclk) / (params_rate(params) * framesync);
		
		/* bitclk field is byte swapped due to mpc5200/b compatibility */
		value = ((framesync - 1) << 24) |
			(((bitclk - 1) & 0xFF) << 16) | ((bitclk - 1) & 0xFF00);
		
		dev_dbg(psc_i2s->dev, "%s(substream=%p) rate=%i sysclk=%i"
			" framesync=%i bitclk=%i reg=%X\n",
			__FUNCTION__, substream, params_rate(params), psc_i2s->sysclk,
			framesync, bitclk, value);
		
		out_be32(&psc_i2s->psc_regs->ccr, value);
		out_8(&psc_i2s->psc_regs->ctur, bits - 1);
	}

-- 
Jon Smirl
jonsmirl at gmail.com