[Cbe-oss-dev] [patch 9/9] powerpc/cell: Add DMA_ATTR_STRONG_ORDERING dma attribute and use in IOMMU code

[Benjamin Herrenschmidt]

On Thu, 2008-07-17 at 16:53 +0200, Arnd Bergmann wrote:
> 
> Peter and Hans were involved in the discussion that led to the
> decision
> to change step 3 from per-transfer default to always weak ordering.
> I think they verified that this is safe for all the peripherals that
> we
> have on the QS21 and QS22 blades (tg3, ehci, mthca, mptsas), but that
> doesn't mean that it is safe in general, so I guess you are right that
> we should not make it the default in the kernel for Cell systems.
> Hans, can you confirm this?

I'm surprised with tg3. We need to make sure that updates to the
hw status block are properly ordered vs writes to the ring, among
other things.

Ben.