[PATCH 1/3] mpc83xx: Power Management support
Kumar Gala
galak at kernel.crashing.org
Thu Jul 3 03:06:02 EST 2008
> diff --git a/arch/powerpc/platforms/83xx/suspend-asm.S b/arch/
> powerpc/platforms/83xx/suspend-asm.S
> new file mode 100644
> index 0000000..03e29a2
> --- /dev/null
> +++ b/arch/powerpc/platforms/83xx/suspend-asm.S
> @@ -0,0 +1,539 @@
> +/*
> + * Enter and leave sleep state on MPC83xx
> + *
> + * Author: Scott Wood <scottwood at freescale.com>
> + *
> + * Copyright (c) 2006 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> modify it
> + * under the terms of the GNU General Public License version 2 as
> published
> + * by the Free Software Foundation.
> + */
> +
> +#include <asm/page.h>
> +#include <asm/ppc_asm.h>
> +#include <asm/reg.h>
> +#include <asm/asm-offsets.h>
> +
> +#define SS_MEMSAVE 0x00
What is this? add a comment?
> +#define SS_HID 0x08 /* 3 HIDs */
> +#define SS_IABR 0x14 /* 2 IABRs */
> +#define SS_IBCR 0x1c
> +#define SS_DABR 0x20 /* 2 DABRs */
> +#define SS_DBCR 0x28
> +#define SS_SP 0x2c
> +#define SS_SR 0x30 /* 16 segment registers */
> +#define SS_CURRENT 0x70
How about SS_R2 to match the pmac sleep.S code. It will make
refactoring all this easier in the future.
> +#define SS_MSR 0x74
> +#define SS_SDR1 0x78
> +#define SS_LR 0x7c
> +#define SS_SPRG 0x80 /* 4 SPRGs */
> +#define SS_DBAT 0x90 /* 8 DBATs */
> +#define SS_IBAT 0xd0 /* 8 IBATs */
> +#define SS_TB 0x110
> +#define SS_CR 0x118
> +#define SS_GPREG 0x11c /* r12-r31 */
> +#define STATE_SAVE_SIZE 0x16c
- k
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