[RFC][PATCH] ibm_newemac: PowerPC 440EP/440GR EMAC PHY clock workaround

[Josh Boyer]

On Tue, 26 Feb 2008 09:10:06 -0500
"Steven A. Falco" <sfalco at harris.com> wrote:

> When I saw Josh's question, I thought the irq save/restore was there to
> make the read-modify-write atomic; i.e. read SDR0_MFR, "AND" out some
> bits, then write it back without the possibility of anything else
> touching SDR0_MFR.  I'm just starting to get familiar with the kernel,

That was probably the intention, yes.

> so if you have a chance, please help educate me.  Does the irq lock in
> mtdcri protect the read-modify-write? Or maybe this R-M-W doesn't need
> protecting?

Nope, it doesn't.  It is possible for something to come in between the
first call to mtdcri and the second call to mtdcri and modify the
value.  The window would be quite small, but I suppose it's
theoretically possible.

Seems the code will do the right thing since everything is using
flags.  I suppose my question can be withdrawn.  It is slightly
confusing to do it that way though.  Perhaps a function to do
read-modify-writes on DCRs would be welcome.  dcr_modify anyone?

josh