[PATCH 7/16] powerpc/mm: Rework context management for CPUs with no hash table v2
kumar.gala at freescale.com
Thu Dec 18 08:30:00 EST 2008
On Dec 14, 2008, at 11:44 PM, Benjamin Herrenschmidt wrote:
> This reworks the context management code used by 4xx,8xx and
> freescale BookE. It adds support for SMP by implementing a
> concept of stale context map to lazily flush the TLB on
> processors where a context may have been invalidated. This
> also contains the ground work for generalizing such lazy TLB
> flushing by just picking up a new PID and marking the old one
> stale. This will be implemented later.
> This is a first implementation that uses a global spinlock.
> Ideally, we should try to get at least the fast path (context ID
> already assigned) lockless or limited to a per context lock,
> but for now this will do.
> I tried to keep the UP case reasonably simple to avoid adding
> too much overhead to 8xx which does a lot of context stealing
> since it effectively has only 16 PIDs available.
> Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
> v2. remove some bugs with active tracking on SMP
I'd personally like a bit more commentary on how the stale map
addresses the SMP issues in the commit message.
Also, Paul had a comment that we've kept around related to 8xx/4xx SMP
as well as LRU.. is that still relevant?
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