MPC8572 - IPR Register

[Kumar Gala]

On Dec 16, 2008, at 4:08 PM, bterrell wrote:

>
>
> Kumar Gala-3 wrote:
>>
>>
>> <1. Which PCIe port is the device on?
>> 2. is this a INT-X style or MSI interrupt?
>> 3. if INT-X is INT-A, B, C, D?
>>
>> - k
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>>
>
> He was posting a question for me.  The external device (PLX8616
> non-transparent bridge) which is sending the interrupt is connected  
> to the
> first PCIE controller.  The PCIE controller is configured in RC mode  
> and is
> "x4".  I'm using legacy (INTx) interrupts from the external switch  
> NTB port.
> The NTB port always generates INTA, but is swizzled by the upstream  
> port of
> the PLX8616 switch, so it comes to the PCIE controller as INTB I  
> believe.
>
> It works fine when the the 8572 and 8616 both start after power-on  
> reset.
> Can send multiple interrupts and each is acknowledged properly.   
> However,
> after I generate a "hot reset" event from the PCIE controller to the
> upstream port on the 8616 (or link goes down/up), it no longer seems  
> to
> propagate the INTx interrupt to the CPU.  Either the 8616 is not  
> sending the
> interrrupt or the 8572 is ignoring/masking it.  I'm trying to  
> determine
> which device is at fault.  I don't have access to a PCIE analyzer at  
> the
> moment.  Looking for some more visibility into received interrupts  
> within
> the 8572 PCIE or MPIC.
>
> FYI, I have not tried MSI yet but will soon.

So I'll ask the same questions.  I can point you at some registers to  
look at but wanted the details I asked about earlier.

- k