[PATCH 11/16] powerpc/mm: Add SMP support to no-hash TLB handling v3

[Kumar Gala]

On Dec 15, 2008, at 3:03 PM, Benjamin Herrenschmidt wrote:

>
>>> The whole thing. Not totally clear, you have a better name ? Some  
>>> CPUs
>>> want a lock on sync and some on ivax, I plan to lock the whole
>>> sequence.
>>
>> MMU_FTR_TLBIVAX_OR_SYNC_NEED_LOCK ?
>
> Which completely blows away the nice tab'ing :-)
>
> MMU_FTR_LOCK_BCAST_TLB_OPS ?

Hmm.. are you mixing the two different locking needs together?  The is  
locking of ivax vs tlbwe and there is locking around multiple "msgs"  
on the bus.  I know for us we can have any # of ivax's on the bus, but  
only one tlbsync.

>> Its probably a good idea to have a clear definition of what each of
>> these flags means in the commit message.
>
> No, I'd rather have that in a comment in the code.

that's fine w/me.

- k