How to support 3GB pci address?

[Scott Wood]

Kumar Gala wrote:
> 
> On Dec 12, 2008, at 3:04 AM, Trent Piepho wrote:
> 
>> On Thu, 11 Dec 2008, Kumar Gala wrote:
>>> On Dec 11, 2008, at 10:07 PM, Trent Piepho wrote:
>>>> Don't the ATMU windows in the pcie controller serve as a IOMMU, making
>>>> swiotlb
>>>> unnecessary and wasteful?
>>>
>>> Nope.  You have no way to tell when to switch a window as you have no 
>>> idea
>>> when a device might DMA data.
>>
>> Isn't that what dma_alloc_coherent() and dma_map_single() are for?
> 
> Nope.  How would manipulate the PCI ATMU?

It could dynamically set up 1GB or so windows to cover 
currently-established mappings as they happen, and fall back on bounce 
buffering if no windows are available.  This avoids penalizing a 
DMA-heavy application that is the only DMA user (so no window 
thrashing), but happens to live in high memory.

That said, let's get things working first, and optimize later.

-Scott