Why does one "stw" fail with address translation disabled in PPC405EP?

[Wolfgang Denk]

Dear Zhou Rui,

In message <1219479992.7565.17.camel at localhost> you wrote:
>
> > >    I am running a kernel module which will execute a user space
> > >application. The entry point of the application is 0x100000a0. At the
> > 
> > That should be the first clue that you are doing it wrong.  Don't do
> > stuff like that in modules...
> 
> Oh, but our project needs a function like that ...

You should really think about this. Why do you think you  need  this?
What  exactly  are  you  trying  to  do?  [Probably  there are better
approaches to solve your problem...]

> It is physical address at this moment. Address translation is disabled
> automatically (MSR[IR, DR] = [0, 0]) because of TLB Miss Exception and
> Instrunction Storage Exception.

Hm.. are you absolutely sure that the 0x100000a0 mentioned above is a
physical address?

> > Do you have enough DRAM to cover that?  Some of those boards only come
> > with 32MiB of DRAM.
> 
> My board only has 32MB DRAM. Do you mean 32MB is not enough for that?

Well, 0x1000'00A0 is above 256 MB, while you  have  only  32  MB  RAM
which is most probably mapped from 0x0000'0000...0x01FF'FFFF... So
what you claim to be a physical address (and I think your claim is
wrong) is far outside available physical memory.

> The same codes can run well in a PPC440EP (Yosemite Board) which owns
> 256MB DRAM. At the beginning of my work, I thought memory size may be
> the cause of failure. But I did not know how to demonstrate it. So if
> the limitation of 32MB DRAM leads to the failure, are there any methods
> for the codes to solve it?

I think you got lost on the wrong track. Please describe  which  task
you  want  to  implement, and there might be another, better approach
for it.

Best regards,

Wolfgang Denk

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