Sequoia kernel crash workaround.

[Josh Boyer]

On Wed, 19 Sep 2007 22:39:05 +0400
Valentine Barshak <vbarshak at ru.mvista.com> wrote:

> I've observed kernel crashes on Sequoia board several times.
> Kernel often crashes with high network/memory loads.
> This is due to 440EPx h/w issue.
> 
> According to the errata:
> CHIP_8: Incorrect Write to DDR SDRAM.
> Category: 3
> Overview:
> The write address can be corrupted during writes to DDR SDRAM when write 
> pipelining is enabled on PLB0. The probability of encountering the 
> problem increases with the amount of back-pressure applied by the SDRAM.
> Impact: Data can be written to the wrong address in SDRAM.
> Workaround:
> Disable write pipelining to DDR SDRAM by setting PLB4A0_ACR[WRP] = 0. 
> Only primary write transfers are broadcast and the write address 
> corruption is avoided.

Ew.  That sounds nasty.

> Disabling write pipelining really helps.
> Josh, David, what is the right place to put this workaround to?
> 
> Is it OK to do mtdcr(PLB4A0_ACR, mfdcr(PLB4A0_ACR) & ~PLB4_WRP); in
> arch/powerpc/boot/cuboot-sequoia.c:sequoia_fixups()?
> or
> should this be done in
> arch/powerpc/platforms/44x/sequoia.c:sequoia_setup_arch() 
> with dcr_map, dcr_read/write stuff?

Hm, do you happen to know if AMCC is going to release a newer revision
of 440EPx with that fixed?  If so, we should probably do it
conditionally based off of PVR.

As for where to do it, I'd rather it be in sequoia_setup_arch() than
the bootwrapper.  Eventually bootloaders like U-Boot will take a raw
vmlinux so the wrapper won't even be there anymore.

I don't see any reason to use the dcr_map stuff either.  Just check the
PVR, check if the PLB is already set up correctly, and if not set it
with the regular mfdcr/mtdcr functions.  And a comment about why that's
being done would be good.

That's my $0.02 anyway.

josh