[PATCH 1/5] Add Freescale DMA and DMA channel to Documentation/powerpc/booting-without-of.txt file.

[Zhang Wei]

This patch adds Freescale DMA and DMA channel definition to
Documentation/powerpc/booting-without-of.txt file.

Signed-off-by: Zhang Wei <wei.zhang at freescale.com>
Signed-off-by: Ebony Zhu <ebony.zhu at freescale.com>
---
 Documentation/powerpc/booting-without-of.txt |   67 ++++++++++++++++++++++++++
 1 files changed, 67 insertions(+), 0 deletions(-)

diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 76733a3..d114edf 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -52,6 +52,8 @@ Table of Contents
       i) Freescale QUICC Engine module (QE)
       j) Flash chip nodes
       k) Global Utilities Block
+      l) Freescale DMA
+      m) Freescale DMA channel
 
   VII - Specifying interrupt information for devices
     1) interrupts property
@@ -1824,6 +1826,71 @@ platforms are moved over to use the flattened-device-tree model.
 		fsl,has-rstcr;
 	};
 
+   l) Freescale DMA
+
+   The DMA for dma-engine driver of Freescale MPC8540 silicon DMA
+   controller which also fit for MPC8560, MPC8555,
+   MPC8548, MPC8641 and MPC8349 silicon DMA controller,
+
+   For each DMA node, you should define channels included.
+   Please see below 'm) Freescale DMA channel' for DMA channel's definition.
+
+   Required properties:
+
+    - compatible : Should be "fsl,dma".
+    - reg : Offset and length of DMA general status register.
+    - ranges : Should be defined as specified in 1) to describe the
+               DMA controller channels.
+
+  Example:
+	dma at 21000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "fsl,dma";
+		reg = <21300 4>;
+		ranges = <0 21100 200>;
+		dma-channel at 0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,mpc8540-dma-channel";
+			reg = <0 80>;
+			interrupt-parent = <&mpic>;
+			interrupts = <14 2>;
+		};
+		dma-channel at 80 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,mpc8540-dma-channel";
+			reg = <80 80>;
+			interrupt-parent = <&mpic>;
+			interrupts = <15 2>;
+		};
+		dma-channel at 100 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,mpc8540-dma-channel";
+			reg = <100 80>;
+			interrupt-parent = <&mpic>;
+			interrupts = <16 2>;
+		};
+		dma-channel at 180 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,mpc8540-dma-channel";
+			reg = <180 80>;
+			interrupt-parent = <&mpic>;
+			interrupts = <17 2>;
+		};
+	};
+
+   m) Freescale DMA channel
+
+   Required properties:
+
+    - compatible : Should be "fsl,mpc8540-dma-channel"
+                   or "fsl,mpc8349-dma-channel"
+    - reg : Offset and length of the register set for the DMA channel.
+
    More devices will be defined as this spec matures.
 
 VII - Specifying interrupt information for devices
-- 
1.5.2