[PATCH 1/9] 8xx: Fix CONFIG_PIN_TLB.

Scott Wood scottwood at freescale.com
Thu Sep 6 06:53:01 EST 2007

On Wed, Sep 05, 2007 at 01:36:43PM -0700, Dan Malek wrote:
> On Sep 5, 2007, at 12:27 PM, Scott Wood wrote:
> >1. Only map 512K of the IMMR, rather than 8M, to avoid conflicting  
> >with
> >the default ioremap region.
> The original reason to map 8M was so ioremap()
> could use the same wired TLB rather than allocate
> page table entries.  It should also cover all addresses
> mapped to the flash as well.  This was intentional,
> not a mistake.

"intentional" and "mistake" are not mutually exclusive.

Where is the code that checks for pinned TLB entries on 8xx when doing
ioremap?  Why could this not be done with a 512K mapping?  How was this
even tested, given the obvious wrong-register mistake in the other
CONFIG_PIN_TLB section?  On what do you base the assumption that flash is
within 8MB of the IMMR base?

I didn't change it on a whim, I changed it because ioremap() wasn't
working the way it currently is.


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