[PATCH] [POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB handlers

David Gibson dwg at au1.ibm.com
Mon Oct 15 10:54:47 EST 2007


On Fri, Oct 12, 2007 at 06:56:24AM -0500, Josh Boyer wrote:
> On Fri, 2007-10-12 at 13:30 +1000, David Gibson wrote:
> > On Thu, Oct 11, 2007 at 01:42:30PM -0500, Kumar Gala wrote:
> > > Move to using PAGE_OFFSET instead of TASK_SIZE or KERNELBASE value on
> > > 6xx/40x/44x/fsl-booke to determine if the faulting address is a kernel or
> > > user space address.  This mimics how the macro is_kernel_addr()
> > > works.
> > 
> > Actually it's ambiguous whether TASK_SIZE or PAGE_OFFSET is correct in
> > most of these cases (KERNELBASE is certainly wrong, though).
> > 
> > TASK_SIZE is the top of the userspace mapped area, PAGE_OFFSET is the
> > bottom of the linear mapping.  So, strictly speaking there are 3 paths
> > for the miss handlers: < TASK_SIZE => user mapping, >= PAGE_OFFSET =>
> > kernel mapping, between the two => immediate fault.
> > 
> > We get away with a two way comparison on 32-bit because, a) they have
> > the same value and b) none of the pagetables, user or kernel, should
> > have any entries in the in between region so we'll end up in
> > do_page_fault in the end, anyway.
> 
> Kumar's other patch removes the gap.  He changed the default
> CONFIG_TASK_SIZE to 0xc0000000.

That's (a) and only removes the gap in the default configuration..

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson



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