[PATCH 4/7] [POWERPC] QE pario: support for MPC85xx layout

[Kumar Gala]

On Sep 25, 2007, at 9:34 AM, Anton Vorontsov wrote:

> 8 bytes padding required to match MPC85xx registers layout.
>
> Signed-off-by: Anton Vorontsov <avorontsov at ru.mvista.com>
> ---
>  arch/powerpc/sysdev/qe_lib/qe_io.c |    3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/ 
> sysdev/qe_lib/qe_io.c
> index e32b45b..d566e89 100644
> --- a/arch/powerpc/sysdev/qe_lib/qe_io.c
> +++ b/arch/powerpc/sysdev/qe_lib/qe_io.c
> @@ -36,6 +36,9 @@ struct port_regs {
>  	__be32	cpdir2;		/* Direction register */
>  	__be32	cppar1;		/* Pin assignment register */
>  	__be32	cppar2;		/* Pin assignment register */
> +#ifdef CONFIG_MPC85xx

use CONFIG_PPC_85xx

> +	u8	pad[8];
> +#endif
>  };

- k