Timers on mpc8248 etc...

Vitaly Bordug vitb at kernel.crashing.org
Thu Nov 29 22:31:59 EST 2007


On Wed, 28 Nov 2007 21:06:36 -0700
Alan Bennett wrote:

> It comes from uboot.  Can you point me in the right direction to make
> sure its right?
>                PowerPC,8248 at 0 {
>                        device_type = "cpu";
>                        reg = <0>;
>                        d-cache-line-size = <d#32>;
>                        i-cache-line-size = <d#32>;
>                        d-cache-size = <d#16384>;
>                        i-cache-size = <d#16384>;
>                        timebase-frequency = <0>;
>                        clock-frequency = <0>;
>                };
>
if your u-boot is up to  date, it will have fdt command, and by
fdt boardsetup
fdt print /

inspect what u-boot did. Of course you should have dtb preloaded to memory and
fdt addr <offset> should be said to let u-boot know where dtb resides.


> 
> On 11/28/07, Scott Wood <scottwood at freescale.com> wrote:
> > Alan Bennett wrote:
> > > I've got a routine that needs to delay for X microseconds, this
> > > is a must.  The command after schedule_timeout must has to wait
> > > for the HW to complete a task that takes X microseconds.
> > >
> > > I would think that one way to do this is with a simple
> > > schedule_timeout.  But in the example below, the time that passes
> > > from run1() to dontrun() is far less than 3.2 msecs.  Infact,
> > > sometimes its ~ 800 micros according the a analyzer looking at
> > > points triggered in run1() and donrun().  Could this be a
> > > configuration problem with the timer/interrupt that generates the
> > > jiffies?
> >
> > Are you sure the timebase frequency is set correctly in the device
> > tree?
> >
> > -Scott
> >
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-- 
Sincerely, Vitaly



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