[PATCH 0/2] [PPC 4xx] L2-cache synchronization for ppc44x

[Eugene Surovegin]

On Wed, Nov 07, 2007 at 01:40:10AM +0300, Yuri Tikhonov wrote:
> 
>  Hello all,
> 
>  Here is a patch-set for support L2-cache synchronization routines for
> the ppc44x processors family. I know that the "ppc" branch is for bug-fixing only, thus
> the patch-set is just FYI [though enabled but non-coherent L2-cache may appear as a bug for
> someone who uses one of the boards listed below :)].
> 
> [PATCH 1/2] [PPC 4xx] invalidate_l2cache_range() implementation for ppc44x;
> [PATCH 2/2] [PPC 44x] enable L2-cache for the following ppc44x-based boards: ALPR,
> Katmai, Ocotea, and Taishan.

Why is this all needed?

IIRC ibm440gx_l2c_enable() configures 64G snoop region for L2C.

Did AMCC made non-only-coherent L2C chips recently?

-- 
Eugene