[PATCH] powerpc: mpc832x mds: Fix board PHY reset code

[Li Yang]

> -----Original Message-----
> From: Phillips Kim 
> Sent: Tuesday, November 20, 2007 9:05 AM
> To: Kumar Gala; linuxppc-dev at ozlabs.org
> Cc: Van Ackeren Peter; Li Yang
> Subject: [PATCH] powerpc: mpc832x mds: Fix board PHY reset code
> 
> currently the board-level PHY reset code for the mpc832x MDS 
> messes with reset configuration words source settings which 
> is plain wrong (it looks like this board code was 
> cut-n-pasted from the mpc8360 mds code, which has the PHY 
> reset bits in a different BCSR); this patch points the PHY 
> reset code to the proper mpc832x mds PHY reset bits in the BCSR.
> 
> Signed-off-by: Peter Van Ackeren <peter.vanackeren at freescale.com>
> Signed-off-by: Kim Phillips <kim.phillips at freescale.com>

Acked-by: Li Yang <leoli at freescale.com>

> ---
>  arch/powerpc/platforms/83xx/mpc832x_mds.c |    7 ++++---
>  1 files changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c 
> b/arch/powerpc/platforms/83xx/mpc832x_mds.c
> index 972fa85..9e3bfcc 100644
> --- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
> +++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
> @@ -90,10 +90,11 @@ static void __init mpc832x_sys_setup_arch(void)
>  
>  	if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
>  			!= NULL){
> -		/* Reset the Ethernet PHY */
> -		bcsr_regs[9] &= ~0x20;
> +		/* Reset the Ethernet PHYs */
> +#define BCSR8_FETH_RST 0x50
> +		bcsr_regs[8] &= ~BCSR8_FETH_RST;
>  		udelay(1000);
> -		bcsr_regs[9] |= 0x20;
> +		bcsr_regs[8] |= BCSR8_FETH_RST;
>  		iounmap(bcsr_regs);
>  		of_node_put(np);
>  	}
> --
> 1.5.2.2
> 
>