[PATCH 2.6.21-rt2] PowerPC: decrementer clockevent driver

[Milton Miller]

> On Fri, 2007-05-18 at 17:41 +0400, Sergei Shtylyov wrote:
>>     From the "PowerPC Operating Environment Architecture"
>> that I've already quoated it follows that POWER4-compatible
>> decremented exception *must* be edge triggered.
>>
>> says that an exception is generated when the MSB transitions
>> from 0 to 1. It's not clear wether the exception sticks while
>> that bit is 1 or is
>>
>>     Freescale MPC 7450 manual says the same, for example.
>
> I find it extremely silly to implement it as edge anyway. The
> EE line is level triggered, and having a mix of edge and level
> on the same exception without a clean way to retrigger the DEC
> one other than waiting one tick is just causing trouble.

Making it edge triggered means that the operating system gets to
set the max value to 2^32-1 instead of 2^31-1, increasing the
range of the timeouts.

The architecture changed to level sensitive when support for
shared processor lpars was being added so that the hypervisor
didn't have to do dances to avoid pending decrementer
interrupts when changing partitions.

Besides, they aren't the same vector, just the same enable.

Oh, and loading the decrementer with 1 instead of 0 is the
workaround for an errata on at least one supported cpu.

milton