fsl booke MM vs. SMP questions

[Liu Dave-r63238]

Ben,

> You never "loose" IPIs in the sense that you always get at least 1
> interrupt for N IPIs and it's up to software to make sure not to lose
> any event. The linux kernel arch code usually handles that with a
> synchronous IPI mecanism.

Due to the synchronous IPI mechanism for TLB invalidatation, it is
very time exhausting, there are interrupt overhead and wait time for
sync.

I also noticed that tlb invalidation on the PowerPC 750 SMP system
is using the IPI mechanism, that is because the 750 can not broadcast
tlb invalidation ops.
 
If the broadcast tlbivax instruction is more effective than the IPI
mechanism?

Did you evaluate the performance with the two different ways?

-d