[PATCH 5/5] PCI fixes for the MPC8641 Rev 2.0 silicon and Rev 1.02hardware

[David Gibson]

On Thu, May 17, 2007 at 01:46:26PM -0500, Timur Tabi wrote:
> Wade Farnsworth wrote:
> 
> > Yes.  On rev 1.0 boards, all of the devices on the south bridge are on
> > bus 0, while on rev 1.02, the devices on the southbridge are on bus 2.
> > 
> > I'd like to use the same dts for both rev's if possible.  But if there
> > is a reason why they shouldn't, I suppose I could create a separate dts.
> 
> I think two DTS files is the best approach for now.  A few of us had
> an idea to introduce conditional statements in to the DTS, and

Erm... how would you encode such conditionals in the dtb?  I really
don't like the idea of having a generalized conditional
parser/evaluator built into the bootwrapper.

What I'd been thinking for situations like this is to fold two dtbs
into the bootwrapper and have it select between them based on on board
revision (assuming that can be deduced from registers somehow).

> U-Boot would examine the board and/or environment variables and then
> apply the conditions to the device tree before booting the kernel.
> This would allow you to merge the two DTS files into one, but we're
> quite a ways off from implementing this feature.  In the meantime,
> two DTS files is okay.
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson