[PATCH] powerpc: add dts entries to 85xx for EDAC
Kumar Gala
galak at kernel.crashing.org
Thu May 10 15:25:19 EST 2007
On May 9, 2007, at 11:53 AM, Dave Jiang wrote:
>
> Adding memory-controller and l2-cache-controller entries to be used
> by EDAC as
> of_devices.
>
> Signed-off-by: Dave Jiang <djiang at mvista.com>
>
> ---
> arch/powerpc/boot/dts/mpc8540ads.dts | 16 ++++++++++++++++
> arch/powerpc/boot/dts/mpc8548cds.dts | 16 ++++++++++++++++
> arch/powerpc/boot/dts/mpc8560ads.dts | 18 +++++++++++++++++-
> 3 files changed, 49 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/
> boot/dts/mpc8540ads.dts
> index f261d64..5471227 100644
> --- a/arch/powerpc/boot/dts/mpc8540ads.dts
> +++ b/arch/powerpc/boot/dts/mpc8540ads.dts
> @@ -48,6 +48,22 @@
> reg = <e0000000 00100000>; // CCSRBAR 1M
> bus-frequency = <0>;
>
> + memory-controller at 2000 {
> + compatible = "fsl,8540-memory-controller";
> + reg = <2000 1000>;
> + interrupt-parent = <&mpic>;
> + interrupts = <2 2>;
> + };
> +
> + l2-cache-controller at 20000 {
> + compatible = "fsl,85xx-l2-cache-controller";
we should probably do the same fsl,8540-l2-cache-controller, fsl,8548-
l2-cache-controller, ...
> + reg = <20000 1000>;
> + cache-line-size = <20>; // 32 bytes
> + cache-size = <40000>; // L2, 256K
> + interrupt-parent = <&mpic>;
> + interrupts = <0 2>;
> + };
> +
> i2c at 3000 {
> device_type = "i2c";
> compatible = "fsl-i2c";
> diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/
> boot/dts/mpc8548cds.dts
> index b2b2200..f0c5256 100644
> --- a/arch/powerpc/boot/dts/mpc8548cds.dts
> +++ b/arch/powerpc/boot/dts/mpc8548cds.dts
> @@ -48,6 +48,22 @@
> reg = <e0000000 00100000>; // CCSRBAR 1M
> bus-frequency = <0>;
>
> + memory-controller at 2000 {
> + compatible = "fsl,8548-memory-controller";
> + reg = <2000 1000>;
> + interrupt-parent = <&mpic>;
> + interrupts = <2 2>;
> + };
> +
> + l2-cache-controller at 20000 {
> + compatible = "fsl,85xx-l2-cache-controller";
> + reg = <20000 1000>;
> + cache-line-size = <20>; // 32 bytes
> + cache-size = <40000>; // L2, 256K
Cache size 512k on 8548.
> + interrupt-parent = <&mpic>;
> + interrupts = <0 2>;
> + };
> +
> i2c at 3000 {
> device_type = "i2c";
> compatible = "fsl-i2c";
> diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/
> boot/dts/mpc8560ads.dts
> index 1f2afe9..144fc65 100644
> --- a/arch/powerpc/boot/dts/mpc8560ads.dts
> +++ b/arch/powerpc/boot/dts/mpc8560ads.dts
> @@ -48,6 +48,22 @@
> reg = <e0000000 00000200>;
> bus-frequency = <13ab6680>;
>
> + memory-controller at 2000 {
> + compatible = "fsl,8540-memory-controller";
> + reg = <2000 1000>;
> + interrupt-parent = <&mpic>;
> + interrupts = <2 2>;
> + };
> +
> + l2-cache-controller at 20000 {
> + compatible = "fsl,85xx-l2-cache-controller";
> + reg = <20000 1000>;
> + cache-line-size = <20>; // 32 bytes
> + cache-size = <40000>; // L2, 256K
> + interrupt-parent = <&mpic>;
> + interrupts = <0 2>;
> + };
> +
> mdio at 24520 {
> device_type = "mdio";
> compatible = "gianfar";
> @@ -110,7 +126,7 @@
> #address-cells = <3>;
> compatible = "85xx";
> device_type = "pci";
> - reg = <8000 400>;
> + reg = <8000 1000>;
> clock-frequency = <3f940aa>;
> interrupt-map-mask = <f800 0 0 7>;
> interrupt-map = <
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