powerpc_flash_init(), wtf!?

Sergei Shtylyov sshtylyov at ru.mvista.com
Sun May 6 03:36:36 EST 2007


Hello.

David Gibson wrote:

>>>>    Yeah, you're right here, and I've probably misunderstood what 
>>>>"memory" node was. In fact, the flash in my system resides on the 
>>>>same local bus as RAM, so the proper place would be behind the "lbc" 
>>>>(or whatever -- it doesn't exist as yet) node on the "soc" bus.  Do 
>>>>you think I need to go and document it as well for such cause? :-]

>>>   No, that probably won't do. MPC85xx SoC bus has ranges = <e0000000 
>>>00100000> and the NOR flash is mapped at 0xff000000, so it seems that 
>>>it can't be located under the "soc" bus (unless that latter has 
>>>"ranges" prop extended?).

>>If the RAM and/or ROM sit on the SoC bus, the "ranges"
>>property in the SoC node should be able to translate
>>their addresses, yes.  You could opt for having the
>>memory controller a separate device node, as a sibling
>>of the "soc" node, if that agrees better with your
>>SoC architecture.  "It all depends".

> But if the flash really is on an external bus controlled by a bus
> controller on the SoC, it sounds like it should go under that bus
> bridge.  In which case the SoC would need another range in its ranges
> property.

    Erm, how multiple memory ranges are supposed to work? Aren't the addresses 
in the "reg" property of subnodes relative to the "ranges" property?

WBR, Sergei



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