[PATCH] Better timer and RTC handling for 8641HPCN.

[Kumar Gala]

On Mar 7, 2007, at 8:09 PM, Zhang Wei-r63237 wrote:

> Hi, Kumar,
>
>>>  	/* Alloc mpic structure and per isu has 16 INT entries. */
>>>  	mpic1 = mpic_alloc(np, res.start,
>>>  			MPIC_PRIMARY | MPIC_WANTS_RESET |
>> MPIC_BIG_ENDIAN,
>>> -			16, NR_IRQS - 4,
>>> +			16, NR_IRQS - 10,
>>>  			" MPIC     ");
>>
>> Why is the number of interrupts reduced by 10?
>
> There's IRQs reserved for mpic using in mpic.c around line 962:
>
> 	mpic->timer_vecs[0] = intvec_top - 8;
> 	mpic->timer_vecs[1] = intvec_top - 7;
> 	mpic->timer_vecs[2] = intvec_top - 6;
> 	mpic->timer_vecs[3] = intvec_top - 5;
> 	mpic->ipi_vecs[0]   = intvec_top - 4;
> 	mpic->ipi_vecs[1]   = intvec_top - 3;
> 	mpic->ipi_vecs[2]   = intvec_top - 2;
> 	mpic->ipi_vecs[3]   = intvec_top - 1;
> 	mpic->spurious_vec  = intvec_top;
>
> So I reduces it by 10 for IRQs reserved (leave 1 more space for
> further).

Why don't we set the number to 64 instead of NR_IRQS - 10.  This  
covers all the internal and external interrupts.

- k