[PATCH 09/15] [POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file.

[Segher Boessenkool]

>>>>>>>> -		ranges = <0 f8000000 00100000>;
>>>>>>>> -		reg = <f8000000 00100000>;	// CCSRBAR 1M
>>>>>>>> +		ranges = <00001000 f8001000 000ff000
>>>>>>>> +		reg = <f8000000 00001000>;	// CCSRBAR
>>
>>>> There is "BAR" in the name, so it is a movable range?  Where
>>>> is the base address set?
>>>
>>> in a MMIO register in the space itself.
>>
>> Oh, *great* design.</sarcasm>
>
> its not that bad ;)

Well there's no way to configure it if the current
configuration is screwed, or you just don't know
what the current configuration is.  Anyway, that's
all beside the point here.

>>>> What is the relationship between (in the example) the address
>>>> ranges x'f800_0000+1000 and x'f800_1000+ff000?
>>>
>>> uugh, not sure what that's all about.
>>
>> Reading back I see that the CCSR region is 1MB, and only the
>> first 4kB are for this PHB.  What is the rest of this range
>> used for -- devices on this PCI bus, other SoC devices, ...?
>
> No, the first 4kB are SOC/platform level config registers (high level 
> window setup, CCSR location, etc).
>
> The PHB registers are somewhere in the middle (0x8000, I think).  All 
> the children devices (enet, PHBs, etc) live in the 1M block.

So:

-- CCSR doesn't sit on PCI at all
-- It is a SoC register space
-- And it is only needed for configuration, not for normal
    operation? ( <-- I so much hope this one is true!)

> I think my original idea was the reg property on the SOC node was for 
> the first 4k block that held the SOC config registers.  I think what 
> Wade did is correct since the reg property on the SOC node isnt going 
> to get translated through the ranges property and that they should be 
> mutually exclusive.

Yeah but I'm wondering about the other devices on CCSR now...


Segher