[PATCH] Add StorCenter DTS first draft.

[Segher Boessenkool]

>>>> +			/* Following required by dtc but not used */
>>>> +			i-cache-line-size = <0>;
>>>> +			d-cache-line-size = <0>;
>>>> +			i-cache-size = <4000>;
>>>> +			d-cache-size = <4000>;
>>>> +		};
>>>
>>> The 32 bits kernel may not be using those yet, but it will. 64 bits
>>> does
>>> already and I plan to merge those bits at one point.
>>
>> Hrm, what does it use it for?  Are you going to require
>> all other defined CPU properties as well (like the PowerPC
>> binding does)?
>
> Cache line size is used by the kernel on ppc64 for things like  
> clearing
> memory (to get the stride between subsequent dcbz) or flushing the
> cache :-) It's also passed on to userland.
>
> If it's absent from the device-tree, we default to the values in the
> cputable, but if you're going to put the properties in the tree, don't
> put a 0 in there. As it is, the day I make the 64 bits code common,  
> your
> DT will break unless I special case "0".

So your plan is to prefer the device tree over the cputable, and
maybe even deprecate the cputable?  I was under the impression
that we were going the exact opposite way (we don't have many of
required properties in CPU nodes in most DTS files).  Either way
is fine with me, just choose one; but picking a little from the
device tree and the rest from the cputable doesn't sound useful to
me, and it would be a lovely maintenance problem.


Segher