[RFC/PATCH 14/16] MPIC MSI backend
segher at kernel.crashing.org
Fri Jan 26 19:47:51 EST 2007
>>> MPIC MSI backend. Based on code from Segher, heavily hacked by me.
>>> Renamed to mpic_htmsi, as it only deals with MSI over
>>> + /* FIXME should we save the existing type */
>>> + set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
>> What exactly does the "virq" represent here?
>> I'd like to understand if the FIXME comment could be dropped (or
Now that we don't reuse existing PCI vectors on MPIC (or
do you still do that, Michael?) this FIXME can go.
>> I don't get the impression it's related to a PCI IRQ line.
>> Maybe irq_create_mapping() has comments that describe hwirq and virq?
>> If not, it would be useful if those terms were described.
The code you comment on lives in arch/powerpc/. virq and
hwirq are used in there all over the place. Have a look.
> I don't have a clue why it is called virq. But looking at the
> usage it must be a linux irq number as shown in /proc/interrupts and
> as such there need be no connection with hardware.
Well of course it's connected to real hardware. The virq
numbers are a flat space; hwirqs are not (those are relative
to one certain interrupt controller) so virqs are easier
> I believe the ppc model is to allocate an interrupt source on their
> existing interrupt controller and use that instead of the normal x86
> case of having the MSI interrupt go transparently to the cpu.
That's not the "PowerPC model". On PowerPC, there is
really only one external interrupt to the CPU. This
is usually connected to a "master interrupt controller",
in this case, the MPIC on the U3/U4 system controller.
This specific controller implements MSIs (just like
HT interrupts really) by mapping HT writes to certain
addresses to an IRQ input on the MPIC. The only thing
this code does is set the sense/polarity for this IRQ
You really don't need to know any of this if what you
care about is x86. I really wonder how you can call
the x86 case "normal" or what you mean by "transparently"
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