[PATCH] powerpc: document new interrupt-array property

David Gibson david at gibson.dropbear.id.au
Thu Feb 22 12:18:11 EST 2007


On Wed, Feb 21, 2007 at 06:29:22PM -0600, Kumar Gala wrote:
> 
> On Feb 21, 2007, at 5:25 PM, Stuart Yoder wrote:
> 
> >
> > Added description of an interrupt-array property. This
> > is needed to cleanly describe the interrupt properties
> > of devices with interrupts routed to multiple
> > interrupt controllers.
> >
> > Created a new section VII to describe interrupt
> > representation in general and moved Section VI #2
> > ('Specifiying interrupt information for SOC devices')
> > to this new section.
> >
> > Signed-off-by: Stuart Yoder <stuart.yoder at freescale.com>
> > ---
> 
> what problem is this trying to solve?

As he says, it's for devices with interrupts routed to multiple
controllers.  The normal interrupts property assumes a single
interrupt parent for a device.  This is needed on most 4xx boards,
where the MAL has 5 interrupts, some of which are on UIC0 and some of
which are on UIC1.  At the moment the Ebony port deals with this using
an "interesting" hack, treating the MAL as an interrupt nexus for
itself, using an interrupt-map to remap its interrupts to the two
controllers.  The interrupt-array proposal does the same thing much
more neatly and compactly.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson



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