[PATCH] [POWERPC] Fix interrupt routing and setup of ULI M1575 on FSL boards

[Kumar Gala]

On Aug 17, 2007, at 6:53 PM, Paul Mackerras wrote:

> Kumar Gala writes:
>
>> Its a regression in that the ULI M1575 doesn't really work properly
>> on some of these boards in certain situations.
>
> Well, "it doesn't work" isn't of itself a regression, a regression is
> "it used to work and now it doesn't".

Interesting, maybe I was grouping both of these together as things  
that could go in after the -rc1.  I was under the impression that bug  
fixes could also go in post -rc1.

> In any case the lateness x largeness product (LxL) of that patch is a
> bit too high.  Is there a simpler way to fix it that doesn't involve
> moving all that code around?

I'm not really sure how to accomplish that.  I could possibly  
duplicate the 'fixes' in each board port but that seems pointless and  
I doubt would reduce the code modifications amount any.

Most of this has to due with the kernel / firmware / device tree  
interface.  If we have a new firmware that modifies the memory map  
and requires changes to the device tree and kernel is that a fix?

I understand the concern related to the LxL.  I'd also say the set of  
users this effects is very small since its just the two boards.

I leave it up to you if you want to grab this patch or not for  
2.6.23.  If not please pull all these into your for-2.6.24 branch.

- k