[PATCH 3/3] Improve robustness of the UIC cascade handler

[Josh Boyer]

On Tue, 14 Aug 2007 13:52:42 +1000 (EST)
David Gibson <david at gibson.dropbear.id.au> wrote:

> At present the cascade interrupt handler for the UIC (interrupt
> controller on 4xx embedded chips) will misbehave badly if it is called
> spuriously - that is if the handler is invoked when no interrupts are
> asserted in the child UIC.
> 
> Although spurious interrupts shouldn't happen, it's good to behave
> robustly if they do.  This patch does so by checking for and ignoring
> spurious interrupts.
> 
> Signed-off-by: Valentine Barshak <vbarshak at ru.mvista.com>
> Signed-off-by: David Gibson <david at gibson.dropbear.id.au>
> 
> ---
>  arch/powerpc/sysdev/uic.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> Index: working-2.6/arch/powerpc/sysdev/uic.c
> ===================================================================
> --- working-2.6.orig/arch/powerpc/sysdev/uic.c	2007-08-14 13:46:02.000000000 +1000
> +++ working-2.6/arch/powerpc/sysdev/uic.c	2007-08-14 13:46:02.000000000 +1000
> @@ -266,6 +266,9 @@ irqreturn_t uic_cascade(int virq, void *
>  	int subvirq;
> 
>  	msr = mfdcr(uic->dcrbase + UIC_MSR);
> +	if (!msr) /* spurious interrupt */
> +		return IRQ_HANDLED;

Hm.  Is there was a way we could have this case increment
ppc_spurious_interrupts so that the BAD entry in /proc/interrupts would
be updated with these?  Not a huge deal, but it might be nice to have.
Otherwise the patch looks fine.

Acked-by: Josh Boyer <jwboyer at linux.vnet.ibm.com>

josh