pci in arch/powerpc vs arch/ppc

[Alexandros Kostopoulos]

Hi all,

I've noticed the following: In function pci_process_bridge_OF_ranges, when  
parsing the ranges for MEM and I/O space, the res->start for mem is  
correctly set to ranges[na+2], which is the cpu address in the ranges  
property. However, in I/O related code, res->start is set to ranges[2],  
which is in the PCI address field of the ranges property (and in my case  
is 0, as is also for the mpc8272ads case as well). Thus, the res->start of  
the I/O of the bridge is 0, which leads to the first device with I/O space  
(a davicom ethernet device) been also assigned a I/O region starting at 0.  
Finally, the dmfe (davicom ethernet driver over PCI) fails with "dmfe: I/O  
base is zero". So, is the implementation of pci_process_bridge_OF_ranges  
correct ? shouldn't res->start = ranges[na+2] for I/O as well?

thank you

Alex