[PATCH] Fix special PTE code for secondary hash bucket

Benjamin Herrenschmidt benh at kernel.crashing.org
Fri Aug 3 21:51:15 EST 2007


On Fri, 2007-08-03 at 18:58 +1000, Paul Mackerras wrote:
> The code for mapping special 4k pages on kernels using a 64kB base
> page size was missing the code for doing the RPN (real page number)
> manipulation when inserting the hardware PTE in the secondary hash
> bucket.  It needs the same code as has already been added to the
> code that inserts the HPTE in the primary hash bucket.  This adds it.
> 
> Spotted by Ben Herrenschmidt.
> 
> Signed-off-by: Paul Mackerras <paulus at samba.org>

Acked-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>

> ---
> diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
> index 4762ff7..35eabfb 100644
> --- a/arch/powerpc/mm/hash_low_64.S
> +++ b/arch/powerpc/mm/hash_low_64.S
> @@ -472,10 +472,12 @@ _GLOBAL(htab_call_hpte_insert1)
>  	/* Now try secondary slot */
>  
>  	/* real page number in r5, PTE RPN value + index */
> -	rldicl	r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT
> +	andis.	r0,r31,_PAGE_4K_PFN at h
> +	srdi	r5,r31,PTE_RPN_SHIFT
> +	bne-	3f
>  	sldi	r5,r5,PAGE_SHIFT-HW_PAGE_SHIFT
>  	add	r5,r5,r25
> -	sldi	r5,r5,HW_PAGE_SHIFT
> +3:	sldi	r5,r5,HW_PAGE_SHIFT
>  
>  	/* Calculate secondary group hash */
>  	andc	r0,r27,r28
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