qla_wxyz pci_set_mwi question

[Randy Dunlap]

Benjamin Herrenschmidt wrote:
> On Thu, 2007-04-12 at 14:04 -0600, Matthew Wilcox wrote:
>> On Thu, Apr 12, 2007 at 12:37:13PM -0700, Andrew Vasquez wrote:
>>> On Thu, 12 Apr 2007, Matthew Wilcox wrote:
>>>> Why should it fail?  If there's a platform which can't support a
>>>> cacheline size that the qla2xyz card can handle, it should be able to
>>>> happily fall back to doing plain writes instead of MWIs.  IMO, it should
>>>> just call pci_set_mwi() and ignore the result.
>>> I believe there were some erratas on some ISP2xxx chips where MWI
>>> needed to be set for proper operation.  I'll go back, verify and
>>> update the patch accordingly.
>> Hmm.  The thing is that pci_set_mwi() returns success on machines where
>> MWI is disabled (currently only PPC64).  Perhaps it needs to fail
>> instead.
> 
> MWI isn't diabled on ppc64... or did I miss something ?
> 
> Ben.
> 

Willy was referring to this from include/asm-powerpc/pci.h:

#ifdef CONFIG_PPC64

/*
 * We want to avoid touching the cacheline size or MWI bit.
 * pSeries firmware sets the cacheline size (which is not the cpu cacheline
 * size in all cases) and hardware treats MWI the same as memory write.
 */
#define PCI_DISABLE_MWI


which makes pci_set_mwi() do nothing other than return 0;


-- 
~Randy
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