qla_wxyz pci_set_mwi question
Benjamin Herrenschmidt
benh at kernel.crashing.org
Fri Apr 13 12:43:43 EST 2007
> Willy was referring to this from include/asm-powerpc/pci.h:
>
> #ifdef CONFIG_PPC64
>
> /*
> * We want to avoid touching the cacheline size or MWI bit.
> * pSeries firmware sets the cacheline size (which is not the cpu cacheline
> * size in all cases) and hardware treats MWI the same as memory write.
> */
> #define PCI_DISABLE_MWI
>
>
> which makes pci_set_mwi() do nothing other than return 0;
Interesting... I think I missed that we had that bit for some time :-)
Well, I suppose that on pSeries and probably pmac too, the firmware will
set the MWI bit for us anyway, but that's a bit dodgy to apply that to
all ppc64... they aren't all pSeries.
I'll have to look into that again one of these days.
Cheers,
Ben.
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