[PATCH] Start arch/powerpc/boot code reorganization

Mark A. Greer mgreer at mvista.com
Sat Sep 23 04:59:23 EST 2006


On Fri, Sep 22, 2006 at 10:43:42AM +0200, Segher Boessenkool wrote:
> >>How about you check whether the "64-bit" property exists in the CPU
> >>nodes?
> >
> >That seemed like the right thing until I realized, its still  
> >specifying
> >the physical size, not the virtual size.
> 
> No, it says that the CPU supports the full PowerPC arch, not just the
> 32-bit subset.  Every 64-bit PowerPC has a 64-bit effective address,
> every 32-bit PowerPC has a 32-bit effective address.  There's no way
> around that unless you change most of the instruction set ;-)

Oh, okay.  I didn't realize there was an actual "64-bit" property.
I thought you just meant "/cpus/#address-cells = <2>".
I should've googled first.

So, yes, that probably does give us the info we need.
--

Here is where I think we are for getting the effective base addr
of the regs for the console uart in the bootwrapper:

1) We add the "fw,address" property to the uart's dt node.  That
property provides the effective base address of the uart's registers
left over by the firmware.  The format is similar to that of the
"reg" property in that it contains an "address size" tuple.

2) The effective address width (32 or 64 bits) (i.e., the # cells in
the "address" portion of the tuple) is indicated by the presence of the
"/cpus/64-bit" property.  If it exists, the effective addr space is
64-bits wide (2 cells); if not, its 32-bits wide (1 cell).

3) The number of cells in the "size" portion of the tuple is indicated
by the nearest #size-cells as you go up the tree.  Just like the "reg"
property.

Comments?

Mark



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