[Cbe-oss-dev] [PATCH] powerpc: allow PHBs anywhere in the device tree

Arnd Bergmann arnd at arndb.de
Wed Sep 13 08:39:21 EST 2006

On Wednesday 13 September 2006 00:20, Paul Mackerras wrote:
> Ummm, how do you think we've managed on pSeries all this time?
> I could understand this if you said you needed to represent multiple
> north bridges, though that would be a rather peculiar system
> topology.  Having multiple PCI domains hanging off a single north
> bridge can be represented perfectly well with the host bridges being
> children of the root, because the root node represents the address
> space directly accessible to the processor(s), and it is the north
> bridge that implements that address space.
> What specifically do you want this for?

For the cell blade, we have two bridge chips that are directly
connected to one of the CPUs each and are in separate address spaces.
Besides the PCI host bridges on them (between 1 and 3 per chip,
depending on the model), there are other devices on each bridge chip
that I would like to represent there as well. To make things
worse, they are behind logical bridges on the chip itself, something

/bridge at 1/interrupt-controller
/bridge at 2/plb5/pcie

each of axon, plb5, plb4 and the pci buses has their own ranges
property to map addresses.
While we could probably put all the phbs at the root, i'd much
prefer having the real topology reflected in the device tree.

	Arnd <><

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