[PATCH] qe_ic: Do a sync when masking interrupts.
DaveLiu at freescale.com
Wed Oct 25 14:47:43 EST 2006
> > > Segher Boessenkool wrote:
> > > > If a sync after an MMIO write is enough, then (in almost all
> > > > cases) so is an eieio.
> > >
> > > In this case, the spurious interrupts still happen with
> eieio, but
> > > not with sync.
> > eieio on e300 core is just a no-op.
> It's not sent to the bus on non-cahed storage (like the PCI
> bridge ?) That's pretty bad ... there is quite a bit of code
> that assumes that eieio's will prevent write combining...
Due to the LSU, the e300 cored doesn't reorder non-cached
stroage, and doesn't implementation of write commbining.
So, actually its behavior likes eieio.
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