[PATCH] qe_ic: Do a sync when masking interrupts.
LeoLi at freescale.com
Mon Oct 23 19:35:37 EST 2006
> -----Original Message-----
> From: linuxppc-dev-bounces+leoli=freescale.com at ozlabs.org
> [mailto:linuxppc-dev-bounces+leoli=freescale.com at ozlabs.org] On Behalf
> Sent: Monday, October 23, 2006 12:00 PM
> To: Wood Scott-B07421
> Cc: linuxppc-dev at ozlabs.org
> Subject: Re: [PATCH] qe_ic: Do a sync when masking interrupts.
> Scott Wood writes:
> > This patch causes a sync do be done after masking a QE interrupt, to
> > ensure that the masking has completed before interrupts are enabled.
> > This allows the masking of the cascade IRQ to be removed without
> > spurious interrupts.
> Hmmm. In general a sync having completed doesn't mean that previous
> MMIO stores have actually got to the device. Reading from a device
> register generally does ensure that previous writes have actually got
> to the device though - could you do that instead? I'm concerned that
> adding the sync is not a robust fix and is possibly only working due
> to fortuitous timing.
But an i/o read will be considerably slower than a sync, and it is in
the critical path of interrupt. I have tested the patch under
relatively heavy Ethernet load, and there is no spurious interrupt.
Maybe it is because the device is an SOC device and MMIO store completes
faster. I'm wondering if there is a standard test method to show if the
faster approach is sufficient or not.
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