[PATCH] implement AT_PLATFORM for powerpc

Kumar Gala galak at kernel.crashing.org
Thu Jan 12 01:43:04 EST 2006


This reminds me do we have a bit for having/not having the load/store  
string instructions. If memory serves me there were some discussions  
of looking at "depreciating" the instructions from the architecture.  
Freescale Book-E implementations already do NOT implement them. I  
doubt that Freescale will over implement these instructions ever again.


On Jan 11, 2006, at 2:50 AM, Paul Mackerras wrote:

> Eugene Surovegin writes:
>> I checked 44x user manuals I have:
>> 440GP doesn't have isel
>> 440GX, 440EP, 440SP, 440SPe, 440GR have it.
> Thanks, that's helpful.  Do you know if 440{GX,EP,SP,SPe,GR} implement
> all of the 32-bit user-mode instructions in Book E?
> How do mbar and msync work on those processors?  As mbar and msync (as
> defined in Book E) or as eieio and sync?
> Do the 440* processors in fact claim Book E compliance?
> Thanks,
> Paul.
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