Chenging 2 bits in MSR in ppc6xx_idle() with 1 command?
Guennadi Liakhovetski
g.liakhovetski at gmx.de
Tue Dec 26 07:07:11 EST 2006
Hi
Here's a code fragment from ppc6xx_idle(), which should send the CPU into
a powersaving mode (DOZE or NAP) and re-enable interrupts after a
local_irq_disable():
mfmsr r7
ori r7,r7,MSR_EE
oris r7,r7,MSR_POW at h
1: sync
mtmsr r7
isync
b 1b
Whereas MPC8245's user manual says, that when setting the MSR_POW bit in
the MSR one may not set any other bit in it with the same instruction.
Does this mean that the above does not actually work on those (and
similar) CPUs or does it work because of the loop?
Thanks
Guennadi
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Guennadi Liakhovetski
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