[PATCH]: powerpc documentation: Clarify why twi appears in the i/o macros.

[Paul Mackerras]

Segher Boessenkool writes:

> Except we use a trap with TO=0 so the CPU could optimise the
> dependency away -- or where does it say this is prohibited?

I don't know that it explicitly says it is prohibited, but Ed Silha
agreed when I asked him that optimizing this would be against the
spirit of the architecture, at least.  I don't think the cpu designers
would bother optimizing this since it wouldn't get them any extra
performance on any benchmark.

> My only nit is I can't find a guarantee that the trap instruction will
> have to get the read data as input before it can "report the exceptions
> it caused".  Would you have anything on that?  I'll sleep so much better
> if I know it's safe :-)

Well, clearly in general the conditional-trap instructions would have
to see their input operand(s) before they can report an exception,
since reporting an exception before that would be incorrect behaviour
- you would end up taking a 700 interrupt when you shouldn't.  In
other words I am asserting that if an instruction reports a trap
exception, that leads inevitably to a 700 interrupt (in the
architecture sense of "interrupt"), unless of course an earlier
instruction also reports an exception.

Your point about TO=0 is reasonable, and something I also worried
about a little, but Ed Silha didn't seem to think it was a problem.

Paul.