Not coherent cache DMA for G3/G4 CPUs: clarification needed

Sat Apr 22 07:51:02 EST 2006

>  not claiming to understand all of the issues here, but I have some 
> MV64460 / MPC7448-based systems, and they only boot if 
> CONFIG_NOT_COHERENT_CACHE=y

That is strange... Pegasos uses a Marvell bridge and it works with
coherent cache. Do you have some kernel patches in addition to what is
in mainstream to make CONFIG_NOT_COHERENT_CACHE work at all on
CONFIG_6xx ? At the moment, it doesn't do much ...

Ben.