Not coherent cache DMA for G3/G4 CPUs: clarification needed

[Gerhard Pircher]

> --- Ursprüngliche Nachricht ---
> Von: Eugene Surovegin <ebs at ebshome.net>
> An: Gerhard Pircher <gerhard_pircher at gmx.net>
> Kopie: linuxppc-dev at ozlabs.org, debian-powerpc at lists.debian.org
> Betreff: Re: Not coherent cache DMA for G3/G4 CPUs: clarification needed
> Datum: Thu, 20 Apr 2006 13:38:48 -0700
> 
> There are already non-coherent cache PPC archs (8xx, 4xx) just look 
> how all this implemented there, don't reinvent the wheel.
> 
> Also, read Documentation/DMA-API.txt and DMA-mapping.txt
I know! Unfortunately this implementation does not work at all with G3/G4
PPC desktop CPUs for various reasons (for example due to the BAT mapping,
page tables with different access attributes for the same physical memory
area allocated by the consistent DMA functions, etc.).

regards,

Gerhard

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