[PATCH] Fix ppc32 smp build.

[David Woodhouse]

Fix PPC32 SMP build -- instead of setting the now non-existent
smp_tb_synchronized when the timebases are synchronised, we clear the
CPU_FTR_USE_TB bit when they're not. Does this look sane, and did I miss
cases where they're not synchronised?

Signed-off-by: David Woodhouse <dwmw2 at infradead.org>

diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -363,8 +363,6 @@ static void __init psurge_dual_sync_tb(i
 
 	/* now interrupt the secondary, starting both TBs */
 	psurge_set_ipi(1);
-
-	smp_tb_synchronized = 1;
 }
 
 static struct irqaction psurge_irqaction = {
@@ -396,6 +394,8 @@ static void __init smp_psurge_setup_cpu(
 
 	if (psurge_type == PSURGE_DUAL)
 		psurge_dual_sync_tb(cpu_nr);
+	else
+		cur_cpu_spec->cpu_features &= ~CPU_FTR_USE_TB;
 }
 
 void __init smp_psurge_take_timebase(void)
@@ -624,10 +624,10 @@ void smp_core99_give_timebase(void)
 	/* wait for the secondary to have taken it */
 	for (t = 100000; t > 0 && sec_tb_reset; --t)
 		udelay(10);
-	if (sec_tb_reset)
+	if (sec_tb_reset) {
 		printk(KERN_WARNING "Timeout waiting sync(2) on second CPU\n");
-	else
-		smp_tb_synchronized = 1;
+		cur_cpu_spec->cpu_features &= ~CPU_FTR_USE_TB;
+	}
 
 	/* Now, restart the timebase by leaving the GPIO to an open collector */
        	pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, core99_tb_gpio, 0);

-- 
dwmw2