boot time scheduling hile atomic

[Takeharu KATO]

Hi Joerg:

> I came to the same idea. This explains as well why the i386 party does
> not notice the effect, as their first interrupt happen later (different
> HZ value)
> 
As far as I know, current HZ value for PPC is 1000
as same as i386 family.

Please see following:

-- include/asm-i386/param.h
   1 #ifndef _ASMi386_PARAM_H
   2 #define _ASMi386_PARAM_H
   3
   4 #ifdef __KERNEL__
   5 # define HZ             1000            /* Internal kernel timer 
frequency */
-- include/asm-i386/param.h

-- include/asm-ppc/param.h

   1 #ifndef _ASM_PPC_PARAM_H
   2 #define _ASM_PPC_PARAM_H
   3
   4 #ifdef __KERNEL__
   5 #define HZ              1000            /* internal timer frequency */
   6 #define USER_HZ         100             /* for user interfaces in 
"ticks" */
-- include/asm-ppc/param.h

FYI, Kernel preemption ought not to be taken place at this point,
because preemption count is a positive number.

According to my observation, the problem occur on second call of
proc_root_init.But I could not who call it.
IIRC,the value of LR(link register) pointed at the start of BSS.

Regards,



-- 
Takeharu KATO