PCI Memory mapping

linas at austin.ibm.com linas at austin.ibm.com
Fri Mar 26 03:45:29 EST 2004

On Thu, Mar 25, 2004 at 10:34:14AM -0600, linas at austin.ibm.com wrote:
> On Thu, Mar 25, 2004 at 04:48:46PM +0100, Marc Leeman wrote:
> > As ever, insights are welcome :-/
> OK, another wild guess: are the cache lines properly invalidated?
> I think you said that the corrpution was a copy of earlier data ...
> well, where could 'earlier data' be hiding?  The offsets you're
> reporting sound all wrong, but hey ...

actually, if you have 32-byte cache lines on your cpu, and you
have, umm, something maybe 4-way set associative (I've forgotten
how it works) that might explain it.   I don't know what cpu's
have what cache sizes.

> Don't know how hard it would be for you to run the test with cachine disabled,
> but it might be worth a try.
> --linas

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