multiple separate pci bridges ...

[Benjamin Herrenschmidt]

>         Would you care to rethink those comments?
>
>         It seems unfair to call a chip shit, when you don't have
>         a manual for it and appear to lack any knowledge of it's
>         internals. Do the math for 3 GigE ports running line speed with
>         64 byte packets, and full bandwidth on 2 PCI busses...

It would still have been easy to have them "show up" as PCI devices
for the sake of proper discovery (and eventually mapping their control
registers as PCI devices), without impairing their ability to use
a fast path for DMA transfers.

Ben.


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