Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Mark A. Greer]

     >/ Are you sure that you can get away with this, passed on how the
    manuals/
     >/ (745x) describe the sequence of flush/invalidating the L2 (and,
    L3) ?/

    Do they describe disabling the L1 at all ?

[Somehow I was removed from the -dev & -embedded list.  I was wondering
why I hadn't seen anything for a while  :)]
[Also, trini prodded me to send this email and I didn't go back and read
the whole thread so this may be a little out of context]

Ben, FYI,

The latest 745x user manual is here:
 http://e-www.motorola.com/files/32bit/doc/ref_manual/MPC7450UM.pdf

Here are some relevant sections:
- 3.4.1.1 (p. 3-32) Enabling and Disabling the Data Cache
- 3.4.1.3 (p. 3-33) Enabling and Disabling the Instruction Cache
- 3.6.3.1.5 (p. 3-55) Flushing of L1, L2, and L3


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